Please email Jeff Shafer (shafer -at- rice.edu) for an account if you wish to download files.
Materials Transfer Agreement Requirement:
To download the VHDL design files or compiled hardware bitstream for the RiceNIC, a signed Materials Transfer Agreement (MTA) is required. The MTA should be signed by an authorized representative of the University, such as a professor or department administrator, and not by a student. This form should be faxed to Jeff Shafer, Rice University, Dept. of Electrical and Computer Engineering, at 713-348-5686.
On the MTA, leave the Agreement number field blank. In that top paragraph of the first page, please enter the (1) Date, (2) University Name, (3) State and Country where the University is located, and (4) University Address. On the last page, please enter the (1) University Name and (2) Date, along with the name, title, and signature of the signing party.
Download Restrictions:
Please note that the Xilinx MAC core (in the Virtex FPGA project) and the Xilinx PCI core (in the Spartan FPGA project) have been removed. Rice University is unable to redistribute these cores due to the terms of the Xilinx license, and you must obtain a license separately.
 |
|
|
|
 |
