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Index
- 1
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R. I. Bahar, E. A. Frohm, C. M. Gaona, G. D. Hachtel, E. Macii, A. Pardo, and
F. Somenzi.
Algebraic decision diagrams and their applications.
In Proceedings of the International Conference on Computer-Aided
Design, pages 188-191, Santa Clara, CA, November 1993.
- 2
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B. Bollig, M. Löbbing, and I. Wegener.
Simulated annealing to improve variable orderings for OBDDs.
Presented at the International Workshop on Logic Synthesis,
Granlibakken, CA, May 1995.
- 3
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K. S. Brace, R. L. Rudell, and R. E. Bryant.
Efficient implementation of a BDD package.
In Proceedings of the 27th Design Automation Conference, pages
40-45, Orlando, FL, June 1990.
- 4
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R. K. Brayton et al.
VIS: A system for verification and synthesis.
Technical Report UCB/ERL M95/104, Electronics Research Lab, Univ. of
California, December 1995.
- 5
-
R. E. Bryant.
Graph-based algorithms for Boolean function manipulation.
IEEE Transactions on Computers, C-35(8):677-691, August 1986.
- 6
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R. Drechsler, B. Becker, and N. Göckel.
A genetic algorithm for variable ordering of OBDDs.
Presented at the International Workshop on Logic Synthesis,
Granlibakken, CA, May 1995.
- 7
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S. J. Friedman and K. J. Supowit.
Finding the optimal variable ordering for binary decision diagrams.
IEEE Transactions on Computers, 39(5):710-713, May 1990.
- 8
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M. Fujita, Y. Matsunaga, and T. Kakuda.
On variable ordering of binary decision diagrams for the application
of multi-level logic synthesis.
In Proceedings of the European Conference on Design Automation,
pages 50-54, Amsterdam, February 1991.
- 9
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M. Held and R. M. Karp.
A dynamic programming approach to sequencing problems.
J. SIAM, 10(1):196-210, 1962.
- 10
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N. Ishiura, H. Sawada, and S. Yajima.
Minimization of binary decision diagrams based on exchanges of
variables.
In Proceedings of the International Conference on Computer-Aided
Design, pages 472-475, Santa Clara, CA, November 1991.
- 11
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S.-W. Jeong, T.-S. Kim, and F. Somenzi.
An efficient method for optimal BDD ordering computation.
In International Conference on VLSI and CAD (ICVC'93), Taejon,
Korea, November 1993.
- 12
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S.-I. Minato.
Zero-suppressed BDDs for set manipulation in combinatorial
problems.
In Proceedings of the Design Automation Conference, pages
272-277, Dallas, TX, June 1993.
- 13
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S. Panda and F. Somenzi.
Who are the variables in your neighborhood.
In Proceedings of the International Conference on Computer-Aided
Design, pages 74-77, San Jose, CA, November 1995.
- 14
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S. Panda, F. Somenzi, and B. F. Plessier.
Symmetry detection and dynamic variable ordering of decision
diagrams.
In Proceedings of the International Conference on Computer-Aided
Design, pages 628-631, San Jose, CA, November 1994.
- 15
-
B. F. Plessier.
A General Framework for Verification of Sequential Circuits.
PhD thesis, University of Colorado at Boulder, Dept. of Electrical
and Computer Engineering, 1993.
- 16
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R. Rudell.
Dynamic variable ordering for ordered binary decision diagrams.
In Proceedings of the International Conference on Computer-Aided
Design, pages 42-47, Santa Clara, CA, November 1993.
- 17
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E. M. Sentovich, K. J. Singh, C. Moon, H. Savoj, R. K. Brayton, and
A. Sangiovanni-Vincentelli.
Sequential circuit design using synthesis and optimization.
In Proceedings of the International Conference on Computer
Design, pages 328-333, Cambridge, MA, October 1992.
Fabio Somenzi
2012-02-04